{"id":235754,"date":"2024-10-19T15:22:54","date_gmt":"2024-10-19T15:22:54","guid":{"rendered":"https:\/\/pdfstandards.shop\/product\/uncategorized\/bs-123200-0032001\/"},"modified":"2024-10-25T09:58:50","modified_gmt":"2024-10-25T09:58:50","slug":"bs-123200-0032001","status":"publish","type":"product","link":"https:\/\/pdfstandards.shop\/product\/publishers\/bsi\/bs-123200-0032001\/","title":{"rendered":"BS 123200-003:2001"},"content":{"rendered":"
This British Standard specifies the capability qualifying component, its characteristics to be tested, the test methods and conditions to be applied and the requirements to be fulfilled for testing basic and additional capability, in relation to rigid double-sided printed boards with plated-through holes. It is applicable for rigid double-sided printed boards with plated-through holes made with the materials and surface finishes specified in clause 4<\/b>.<\/p>\n
This British Standard is a capability detail specification intended for use with the IECQ system of quality assessment for electronic components.<\/p>\n
PDF Pages<\/th>\n | PDF Title<\/th>\n<\/tr>\n | ||||||
---|---|---|---|---|---|---|---|
1<\/td>\n | BRITISH STANDARD <\/td>\n<\/tr>\n | ||||||
2<\/td>\n | Committees responsible for this British\ufffdStandard <\/td>\n<\/tr>\n | ||||||
3<\/td>\n | Contents <\/td>\n<\/tr>\n | ||||||
7<\/td>\n | 1 Scope 2 Normative references <\/td>\n<\/tr>\n | ||||||
8<\/td>\n | 3 Terms and definitions 3.1 referee method 4 Capability qualifying component 4.1 General 4.2 Base materials Table 1 Base materials 4.3 Surface finishes <\/td>\n<\/tr>\n | ||||||
9<\/td>\n | Table 2 Metallic finishes Table 3 Organic finishes <\/td>\n<\/tr>\n | ||||||
10<\/td>\n | 5 Range of capability approval 6 Capability test programme 6.1 General 6.2 Other metallic surface finishes 6.3 Organic surface finishes 6.4 External bonded heatsinks <\/td>\n<\/tr>\n | ||||||
11<\/td>\n | 6.5 Demonstration of impedance control 7 Additional capability 7.1 Maximum active board size 7.2 Plated-through hole diameters 7.3 Maximum aspect ratio 7.4 Minimum conductor width and spacing 7.5 Metallic conductor finishes 8 Traceability <\/td>\n<\/tr>\n | ||||||
12<\/td>\n | Table 4 Capability approval test schedule and performance requirements \u2014 General <\/td>\n<\/tr>\n | ||||||
18<\/td>\n | Table 5 Capability approval test schedule and performance requirements \u2014 Additional metallic conductor fi… <\/td>\n<\/tr>\n | ||||||
21<\/td>\n | Table 6 Capability approval test schedule and performance requirements \u2014 Additional contact finishes <\/td>\n<\/tr>\n | ||||||
22<\/td>\n | Table 7 Capability approval test schedule and performance requirements \u2014 Permanent organic finishes <\/td>\n<\/tr>\n | ||||||
24<\/td>\n | Table 8 Capability approval test schedule and performance requirements \u2014 Bonded heatsinks <\/td>\n<\/tr>\n | ||||||
26<\/td>\n | Annex A (normative) Test pattern for marking inks Figure A.1 Test pattern for marking inks <\/td>\n<\/tr>\n | ||||||
27<\/td>\n | Annex B (normative) Test pattern for solder masks Figure B.1 Test pattern for solder masks <\/td>\n<\/tr>\n | ||||||
28<\/td>\n | Annex C (normative) Test pattern for bonded heatsinks Figure C.1 Test pattern for bonded heatsinks <\/td>\n<\/tr>\n | ||||||
29<\/td>\n | Annex D (normative) Use of ANSI\/IPC A-600F Table D.1 Capability approval test schedule \u2014 General and additional metallic conductor finishes <\/td>\n<\/tr>\n | ||||||
30<\/td>\n | Table D.2 Capability approval test schedule \u2014 Printed contacts <\/td>\n<\/tr>\n | ||||||
31<\/td>\n | Table D.3 Capability approval test schedule \u2014 Solder resist Table D.4 Capability approval test schedule \u2014 Flexible\/flex-rigid printed boards <\/td>\n<\/tr>\n | ||||||
32<\/td>\n | Annex E (normative) Test method for determination of characteristic impedance by Time Domain Reflectometr… E.1 Principle E.2 Test specimen E.3 Apparatus E.3.1 Pulse step generator <\/td>\n<\/tr>\n | ||||||
33<\/td>\n | E.3.2 Sampling measurement system E.3.3 Cables E.3.4 Connectors E.3.5 Probes E.4 Procedure E.4.1 Calibration E.4.2 Measurement <\/td>\n<\/tr>\n | ||||||
34<\/td>\n | E.4.2 Calculation E.5 Test report <\/td>\n<\/tr>\n | ||||||
35<\/td>\n | Figure E.1 Test specimen details <\/td>\n<\/tr>\n | ||||||
36<\/td>\n | Figure E.2 Possible equipment configuration <\/td>\n<\/tr>\n | ||||||
37<\/td>\n | Figure E.3 Schematic showing undisturbed interval \u2014 in situ method <\/td>\n<\/tr>\n | ||||||
38<\/td>\n | Figure E.4 Incident wave voltage showing 2 \u00d7 air line delay <\/td>\n<\/tr>\n | ||||||
39<\/td>\n | Figure E.5 Schematic showing undisturbed interval Annex F (informative) Sample handling considerations for TDR F.1 Probe to sample interconnection F.2 Reversed signal and ground connections F.3 Grounding of stripline ground\/power planes <\/td>\n<\/tr>\n | ||||||
40<\/td>\n | F.4 Influence of unwanted contact with the test coupon F.5 Variation in ambient temperature Annex G (informative) Additional information about TDR <\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":" System of quality assessment. Capability detail specification. Rigid double-sided printed boards with plated-through holes<\/b><\/p>\n |