IEEE 2416-2019
$47.67
IEEE Standard for Power Modeling to Enable System-Level Analysis
Published By | Publication Date | Number of Pages |
IEEE | 2019 | 63 |
New IEEE Standard – Active. In this standard, a parameterized and abstracted power model enabling system, software, and hardware intellectual property (IP)–centric power analysis and optimization are described. Concepts and constructs are defined for the development of parameterized, accurate, efficient, and complete power models for systems and hardware IP blocks usable for system power analysis and optimization. Process, voltage, and temperature (PVT) independence; power and thermal management interface; and workload and architecture parameterization are some of the concepts included.
PDF Catalog
PDF Pages | PDF Title |
---|---|
1 | IEEE Std 2416™-2019 Front cover |
2 | Title Page Abstract/Keywords Important Notices Participants Introduction Contents 1. Overview 2. Normative references 3. Definitions, acronyms, and abbreviations 4. Model architecture 5. Library-level semantics 6. Cell declaration semantics 7. Contributors 8. Tables 9. Expressions Annex A (informative)Bibliography Annex B (informative)Example models |
11 | 1.1 Scope 1.2 Purpose 1.3 Key aspects and considerations |
12 | 1.4 Typographic considerations |
13 | 3.1 Definitions 3.2 Acronyms and abbreviations |
14 | 4.1 Two modeling levels |
15 | 4.2 Four modeling representations |
16 | 5.1 Library 5.2 Technology |
17 | 5.3 Units |
18 | 5.4 ModelParameters 5.5 ModelExpressions |
19 | 5.6 ModelConditions 5.7 ModelContributors |
21 | 6.1 Cell |
22 | 6.2 Pins |
23 | 6.3 Modes |
24 | 6.4 Events |
26 | 6.5 CellParameters 6.6 States |
27 | 6.7 DynamicPower and StaticPower |
28 | 7.1 PowerContributor |
29 | 7.2 EnergyContributor 8.1 separator, RowSeparator, and ArraySeparator |
30 | 8.2 valueType |
31 | 8.3 Indices 8.4 Data array |
33 | 9.1 Expression types 9.2 Expression element |
34 | 9.3 ExpressionParameters 9.4 Global and local expressions |
38 | B.1 Full library example |
47 | B.2 Units examples |
49 | B.3 AND2 bit-level model with contributors |
50 | B.4 LFSR bit-level model with contributors |
52 | B.5 LSFR multi-level model with contributors, scalars, and expressions |
54 | B.6 Memory controller system-level model with expressions |
55 | B.7 Interconnect bus system-level model with table |
56 | B.8 Power contributor |
57 | B.9 Table examples B.9.1 Dynamic Power and Static Power |
58 | B.9.2 PowerContributor B.9.3 EnergyContributor |
59 | B.9.4 Two-dimensional tables B.9.5 Multidimensional tables |
60 | B.10 Expressions B.10.1 Global expression B.10.2 Referencing a global expression |
61 | B.10.3 Local expressions B.10.4 Using expressions to reference contributors |