IEEE 1241 2001

$63.38

IEEE Standard for Terminology and Test Methods for Analog-to-Digital Converters

Published By	Publication Date	Number of Pages
IEEE	2001	98

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Description

New IEEE Standard – Inactive – Superseded. IEEE Std 1241-2000 identifies analog-to-digital converter (ADC) error sources and provides test methods with which to perform the required error measurements. The information in this standard is useful both to manufacturers and to users of ADCs in that it provides a basis for evaluating and comparing existing devices, as well as providing a template for writing specifications for the procurement of new ones. In some applications, the information provided by the tests described in this standard can be used to correct ADC errors, e.g., correction for gain and offset errors. This standard also presents terminology and definitions to aid the user in defining and testing ADCs.

PDF Catalog

PDF Pages	PDF Title
1	Title Page
3	Introduction
4	Participants
5	CONTENTS
7	1. Overview 1.1 Scope
8	1.2 Analog-to-digital converter background
9	1.3 Guidance to the user 1.3.1 Interfacing
10	1.3.2 Test conditions 1.3.3 Test equipment 1.3.4 Test selection
11	1.4 Manufacturer-supplied information 1.4.1 General information 1.4.2 Minimum specifications 1.4.3 Additional specifications
12	1.4.4 Critical ADC parameters
13	2. References 3. Definitions and symbols 3.1 Definitions
20	3.2 Symbols and acronyms
24	4. Test methods 4.1 General 4.1.1 Test setup
26	4.1.2 Taking a record of data 4.1.3 Equivalent time sampling
31	4.1.4 Fitting sine waves
36	4.1.5 Discrete Fourier transforms and windowing
47	4.2 Analog input 4.2.1 Input impedance
48	4.2.2 Static input impedance versus input signal level
49	4.2.3 Static input current 4.3 Static gain and offset 4.3.1 Static gain and offset (independently based)
50	4.3.2 Static gain and offset (terminal-based) 4.4 Linearity 4.4.1 Integral nonlinearity
51	4.4.2 Differential nonlinearity and missing codes
52	4.4.4 Hysteresis
53	4.4.5 Harmonic and spurious distortion
55	4.4.6 Intermodulation distortion
57	4.5 Noise (total) 4.5.1 Signal-to-noise and distortion ratio (SINAD)
60	4.5.2 Effective bits
63	4.5.3 Random noise
69	4.6 Step response parameters 4.6.1 Test method for acquiring an estimate of the step response
70	4.6.2 Slew rate limit 4.6.3 Settling time parameters
71	4.6.4 Transition duration of step response 4.6.5 Overshoot and precursors
72	4.7 Frequency response parameters 4.7.1 Bandwidth (BW)
74	4.7.2 Gain error (gain flatness) 4.7.3 Frequency response and gain from step response
77	4.8 Differential gain and phase 4.8.1 Method for testing a general purpose ADC
80	4.8.2 Method for testing a special purpose ADC
81	4.8.3 Comments on differential phase and differential gain testing
82	4.9 Aperture effects 4.9.1 Aperture width 4.9.2 Aperture delay
83	4.9.3 Aperture uncertainty
84	4.10 Digital logic signals 4.11 Pipeline delay 4.12 Out-of-range recovery 4.12.1 Test method for absolute out-of-range recovery
85	4.12.2 Test method for relative out-of-range recovery 4.12.3 Comments on test methods 4.13 Word error rate 4.13.1 Test methods
87	4.14 Differential input specifications 4.14.1 Input impedance to ground (for differential input ADCs) 4.14.2 Common-mode rejection ratio (CMRR) and maximum common-mode signal level
88	4.14.3 Maximum operating common-mode signal 4.14.4 Common-mode out-of-range recovery time 4.15 Comments on reference signals
89	4.16 Power supply parameters 4.16.1 Power dissipation
90	Annex A (informative) Comment on errors associated with word-error-rate measurement
92	Annex B (informative) Testing an ADC linearized with pseudorandom dither B.1 Characteristics of ADC errors
93	B.1.1 Pseudorandom dither test setup
94	B.1.2 Pseudorandom dither estimation
96	Annex C (informative) Bibliography