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BS EN IEC 63287-1:2021

BS EN IEC 63287-1:2021

$189.07

Semiconductor devices. Generic semiconductor qualification guidelines – Guidelines for IC reliability qualification

Published By Publication Date Number of Pages
BSI 2021 50
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PDF Catalog

PDF Pages PDF Title
2 undefined
5 Annex ZA(normative)Normative references to international publicationswith their corresponding European publications
7 English
CONTENTS
9 FOREWORD
11 INTRODUCTION
12 1 Scope
2 Normative references
13 3 Terms and definitions
4 Product categories and applications
14 5 Failure
5.1 Failure distribution
Tables
Table 1 – Examples of product categories
15 5.2 Early failure
5.2.1 Description
Figures
Figure 1 – Bathtub curve
16 5.2.2 Early failure rate
Figure 2 – Failure process of IC manufacturing lotsduring the early failure period
17 Figure 3 – Weibull conceptual diagram of the early failure rate
19 Figure 4 – Example of a failure ratio: α (in hundreds)and the number of failures for CL of 60 %
20 5.2.3 Screening
21 Figure 5 – Screening and estimated early fail rate in Weibull diagram
22 5.3 Random failure
5.3.1 Description
Figure 6 – Bathtub curve setting the point immediately after production as the origin
Figure 7 – Bathtub curve setting the point after screening as the origin
23 5.3.2 Mean failure rate
Figure 8 – Conceptual diagram of calculation method for the meanfailure rate from the exponential distribution
24 Figure 9 – Conceptual diagram of calculation method forthe mean failure rate as an extension of early failure
26 5.4 Wear-out failure
5.4.1 Description
5.4.2 Wear-out failure rate
Figure 10 – Conceptual diagram of the wear-out failure
27 Figure 11 – Conceptual diagram describingthe concept of the acceleration test
29 6 Reliability test
6.1 Reliability test description
6.2 Reliability test plan
6.2.1 Procedures for creating a reliability test plan
31 Figure 12 – Concept of the reliability testin a Weibull diagram (based on sample size)
Table 2 – Cumulative failure probability 0,1 % over 10 years [×10–6]for the third, fifth and seventh years
32 6.2.2 Estimation of the test time required to confirm the TDDB from the number of test samples
33 6.2.3 Estimation of the number of samples required to confirm the TDDB from the test time
34 6.3 Reliability test methods
Figure 13 – Concept of the reliability test in a Weibull diagram (based on test time)
35 Figure 14 – Difference in sampling sizes according to the m value (image)
36 Table 3 – Major reliability (life) test methods and purposes
37 Table 4 – Examples of the number of test samples and the test timein typical reliability (life) test methods
38 6.4 Acceleration models for reliability tests
6.4.1 Arrhenius model
6.4.2 V-model
6.4.3 Absolute water vapor pressure model
6.4.4 Coffin-Manson model
39 6.5 Concept of family
6.5.1 General
6.5.2 Conducting life test using family
Table 5 – Concept of family (example)
41 Table 6 – Concept of difference/failure mechanism/corresponding test item (examples)
42 6.5.3 Verification of early failure rate using family
Figure 15 – How the screening defect rate is seen dependingon the difference of chip size (example)
43 Table 7 – Factors for calculation examples of early failure rate using family data
44 7 Stress test methods
Table 8 – LTPD sampling table for acceptance number Ac = 0
Table 9 – Major reliability (strength) test methods and purposes
45 8 Supplementary tests
9 Summary table of assumptions
Table 10 – Supplementary tests
46 Table 11 – Accelerating factors, calculation formulae and numerical valuesa
47 10 Summary
48 Bibliography

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BS EN IEC 63287-1:2021
$189.07