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BS EN IEC 61800-5-3:2023

BS EN IEC 61800-5-3:2023

$215.11

Adjustable speed electrical power drive systems – Safety requirements. Functional, electrical and environmental requirements for encoders

Published By Publication Date Number of Pages
BSI 2023 112
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IEC 61800-5-3:2021, which is a product standard, specifies requirements and makes recommendations for the design and development, integration and validation of safety-related encoder (Encoder(SR)) in terms of their functional safety considerations, electrical safety and environmental conditions. It applies to Encoder(SR), being sensors as part of a PDS(SR). This document can also be referred to and used for Encoder(SR) in any other safety-related application, for example safety-related position monitoring. This document is applicable where functional safety of an encoder is claimed and the Encoder(SR) is operating mainly in the high demand or continuous mode. The requirements of IEC 61800-5-2:2016 for PDS(SR) apply to Encoder(SR) as applicable. This document includes additional or different requirements for Encoder(SR). It sets out safety-related considerations of Encoder(SR) in terms of the framework of IEC 61508 (all parts), and introduces requirements for Encoder(SR) as subsystems of a safety-related system. It is intended to facilitate the realisation of the electrical/electronic/programmable electronic (E/E/PE) and mechanical parts of an Encoder(SR) in relation to the safety performance of safety sub-function(s) of an Encoder(SR).

PDF Catalog

PDF Pages PDF Title
2 undefined
5 Annex ZA (normative)Normative references to international publicationswith their corresponding European publications
8 English
CONTENTS
13 FOREWORD
15 INTRODUCTION
16 1 Scope
17 2 Normative references
Figures
Figure 1 – Context of Encoder(SR)
18 3 Terms and definitions
19 Tables
Table 1 – List of terms
26 4 Safety sub-functions
4.1 General
4.2 Safe incremental position (SIP)
4.3 Safe absolute position (SAP)
4.4 Safe speed value (SSV)
4.5 Safe acceleration value (SAV)
27 4.6 Safety sub-functions for evaluation and signalling
5 Management of functional safety
6 Requirements for design and development
6.1 General requirements
Table 2 – Applicable subclauses of IEC 61800-5-2:2016 for Encoder(SR) and respective modifications
29 Table 3 – Applicable references of IEC 61800-5-1:2007 and IEC 61800-5-1:2007/AMD1:2016 for Encoder(SR) and respective modifications
31 6.2 Design standards
6.3 Fault detection
32 6.4 Design requirements for specific types of Encoder(SR)
6.4.1 Design requirements for Encoder(SR) with sine and cosine output signals
33 6.4.2 Design requirements for Encoder(SR) with incremental and absolute output signals
34 6.4.3 Design requirements for Encoder(SR) with square wave signal interface
6.4.4 Design requirements for Resolver
Figure 2 – Example of hardware architecture of Encoder(SR) with incremental and absolute output signal
35 6.5 Design requirements regarding mechanics
6.5.1 General
6.5.2 Design requirements for mechanical fastenings
6.5.3 Design requirements for mechanical connecting elements
6.5.4 Bearings
36 6.6 Design requirements for signal generation
6.6.1 General
6.6.2 Design requirements for signal generation of optical Encoder(SR)
6.6.3 Design requirements for signal generation of magnetic Encoder(SR)
37 6.7 Design requirements for signal processing
6.8 Design requirements for internal evaluation and signaling
6.9 Design requirements for software
6.10 Pre-setting
6.11 Parameterization
6.12 Design requirements for thermal immunity
6.13 Design requirements for mechanical immunity
6.14 Design requirements for integrated connection cables
38 7 Information for use
7.1 General
7.2 Labels
7.3 Information and instructions for safe application of an Encoder(SR)
8 Verification and validation
8.1 General
8.2 Verification of hardware fault tolerance
8.3 Additional verification for Encoder(SR) with sine and cosine output signals
8.3.1 Verification of diagnostic measures for Encoder(SR) with sine and cosine output signals with HFT = 0
8.3.2 Suitability for interpolation
39 8.4 Qualitative FMEDA
40 8.5 Quantification
9 Test requirements
9.1 General
9.2 Planning of tests
9.3 Functional testing
9.4 Electromagnetic (EM) and electrical immunity testing
9.4.1 Electrical tests
41 9.4.2 Electromagnetic (EM) immunity testing
9.5 Thermal immunity testing
9.5.1 General
9.5.2 Dry cold
9.5.3 Dry heat
42 9.5.4 Damp heat
9.5.5 Temperature rise test
9.6 Mechanical immunity testing
9.6.1 Clearances and creepage distances
9.6.2 Short-circuit testing of printed wiring boards
9.6.3 Mechanical fastenings
9.6.4 Mechanical connecting elements
43 9.6.5 Vibration and shock test
44 9.6.6 Mechanical properties of integrated connecting cables
9.6.7 Testing the non-touchability
9.6.8 Deformation testing
9.7 Material tests
9.8 Suitability of the components and materials used
45 9.9 Contamination of solid measure
9.10 Labels
9.11 Instructions
9.12 Test documentation
10 Modification
46 Annexes
Annex A (informative)Types of Encoder(SR)
Table A.1 – Types of Encoder(SR)
49 Annex B (informative)Universal architecture of Encoder(SR)
B.1 General
B.2 The universal Encoder(SR) architecture
Figure B.1 – Universal Encoder(SR) architecture
Table B.1 – Function blocks of the universal Encoder(SR) architecture
50 Annex C (informative)Examples of suitable mechanical tests for rotary Encoder(SR)
C.1 General
C.2.1 Force-locked connection (e.g. by bolted joints)
C.2.2 Form-locked connection (e.g. by feather key)
C.2 Mechanical fastening of the Encoder(SR)
C.2.1 Force-locked connection (e.g. by bolted joints)
C.2.2 Form-locked connection (e.g. by feather key)
51 C.3 Mechanical connecting elements of the Encoder(SR) – Stator coupling (torque support) or shaft-rotor coupling
C.3.1 General
C.3.2 Axial loads
C.3.3 Radial loads
52 Figure C.1 – Example of an additional ring for assembly with eccentricity x
53 Annex D (informative)Extended shock testing for rotary Encoder(SR) mounted to motors
D.1 General
D.2 Pseudo-velocity shock-response spectrum (PVSRS)
D.3 Verification of resilience
Figure D.1 – Sample shock and corresponding PVSRS on 4CP
54 D.4 Testing machine
Figure D.2 – Testing machine
56 Annex E (informative)Dimensioning of clearances and creepage distances on printed wiring boards – Example
E.1 General
E.2 Assumptions
E.3 Application of IEC 61800-5-1:2007, 5.2.2.1
57 Annex F (normative)Information and instructions – Detailed list
F.1 Overview
F.2 Detailed list
60 Annex G (informative)Encoder(SR) fault lists and fault exclusions
61 Table G.1 – Encoder(SR) – Mechanic fault list and fault exclusions
62 Table G.2 – Faults and fault exclusions for the selection, mounting and operation of rolling bearings
Table G.3 – Factors influencing the malfunctioning of rolling bearings – Considerations for selection, mounting and operation
64 Annex H (informative)Quantification
H.1 General
H.2 Safety architecture and safety-related block diagram
65 H.3 Failure rates
Table H.1 – Components for Encoder(SR) and their inclusion in quantification
66 H.4 Failure rates at realistic working temperatures
67 H.5 Quantitative FMEDA and assessment of diagnostic measures
68 H.6 Estimation of the common cause factor β (only in case of redundancy)
H.7 Estimation of the PFH
H.8 Safe failure fraction (SFF)
69 H.9 Determination of the quantitative SIL capability
H.9.1 General
H.9.2 SIL limit by architectural constraints
H.9.3 SIL limit by PFH
70 H.10 Additional considerations to comply with ISO 13849-1
H.10.1 General
H.10.2 MTTFD of a channel
H.10.3 Determination of the quantitative category capability
H.10.4 Determination of the quantitative PL-capability
71 Annex I (informative)Digital processing of sine/cosine signals
I.1 General
I.2 Sampling of sine and cosine signals
Figure I.1 – Digital sampling of sine and cosine signals – Hardware architecture, example
72 I.3 Consequences
Figure I.2 – Lissajous figures of the sine and cosine signals A and B
73 I.4 Measures to improve DC
74 Annex J (informative)Single channel architecture with ideal fault detection
J.1 General
J.2 Ideal fault detection for Encoder(SR) with sine and cosine output signals
76 Annex K (informative)Specifics for single channel incremental Encoder(SR) with sine and cosine output signals
K.1 General
K.2 Single-fault tolerance
K.3 Undetectable faults
K.4 Fault detection (DC)
78 Annex L (normative)Static analysis of signal evaluation and fault detection
L.1 General
L.2 Motivation for the analysis of signal evaluation and fault detection
L.3 What does “static analysis of signal processing” mean?
79 Figure L.1 – Static analysis concept
82 L.4 Standard test signals
L.4.1 Make test signal available (step 1)
Figure L.2 – Static analysis procedure (for one test signal)with variable denominations
83 Figure L.3 – Substitute circuit for Encoder(SR)’s outbound interface
85 L.4.2 Test signal 1
L.4.3 Test signal 2
86 L.4.4 Test signal 3
L.4.5 Test signal 4
87 L.4.6 Test signal 5
L.5 Simulation of signal processing to specification
L.5.1 General
88 Figure L.4 – Example of a circuit for evaluation of the output signals and diagnostics of Encoder(SR) faults
89 L.5.2 Form differential signals (step 2)
L.5.3 Form square-wave signals to specification (Schmitt trigger, step 3)
L.5.4 Perform specified diagnostics (step 4)
90 L.6 Assessment of the signal processing specification
L.6.1 General
91 L.6.2 Assessment concept for the signal processing specification
94 L.7 FMEDA Encoder(SR) for verification of the diagnostic coverage
L.7.1 General
L.7.2 Explanation of the problem
96 L.7.3 Procedure for FMEDA
Figure L.5 – Lissajous diagrams (representation of signal B over signal A) in two fault cases
97 Figure L.6 – Examples of the dual effect of a single component fault
98 L.8 List of variables used for performing static analysis
99 L.9 MS Excel tool for performance of static analysis
100 Annex M (informative)Aspects of diagnostic measures for obtaining incremental position values
M.1 General
M.2 Obtaining position values from incremental signals
101 Figure M.1 – Obtaining position values from incremental signals
102 M.3 Phase error of the sine and the cosine signals
M.3.1 General
M.3.2 Phase errors with absolute values < 90°
Figure M.2 – Counting pulse generation, faultless case
103 Figure M.3 – Counting pulse generation with a phase error of 20°
104 Figure M.4 – Lissajous diagram with a phase error Δϕ = 20°
105 M.3.3 Phase errors with absolute values > 90°
106 M.4 Threshold errors of the square wave signal shapers
M.4.1 General
Figure M.5 – Square-wave signal generation by means of a Schmitt trigger
107 M.4.2 Asymmetric switching thresholds
M.4.3 Unequal switching hysteresis at the square wave shaping for sine and cosine
Figure M.6 – Counting pulse generation with asymmetric switching thresholds
108 Figure M.7 – Counting pulse generation with unequal switching hysteresis
109 Bibliography

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