BS IEC 62050:2005
$215.11
VHDL register transfer level (RTL) synthesis
Published By | Publication Date | Number of Pages |
BSI | 2005 | 128 |
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Specifies a standard for use of very high-speed integrated circuit hardware description language (VHDL) to model synthesizable register-transfer level digital logic. A standard syntax and semantics for VHDL register-transfer level synthesis is defined. The subset of the VHDL language, which is synthesizable, is described, and nonsynthesizable VHDL constructs are identified that should be ignored or flagged as errors.
Status | Withdrawn |
---|---|
Pages | 128 |
Publication Date | 2005-11-07 |
Withdrawn Date | 2010-06-04 |
ISBN | 0 580 46497 0 |
Standard Number | BS IEC 62050:2005 |
Title | VHDL register transfer level (RTL) synthesis |
Identical National Standard Of | IEC 62050:2005 |
Descriptors | Semantics, Computer hardware, Data processing, Programming languages, Integrated circuits |
Publisher | BSI |
Committee | EPL/501 |
ICS Codes | 35.240.50 - IT applications in industry |
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